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PIC18F2X1X/4X1X

DS39636D-page 66

2009 Microchip Technology Inc.

5.3.4

SPECIAL FUNCTION REGISTERS

The Special Function Registers (SFRs) are registers

used by the CPU and peripheral modules for controlling

the desired operation of the device. These registers are

implemented as static RAM. SFRs start at the top of

data memory (FFFh) and extend downward to occupy

the top half of Bank 15 (F80h to FFFh). A list of these

registers is given in Table 5-1 and Table 5-2.

The SFRs can be classified into two sets: those asso-

ciated with the “core” device functionality (ALU, Resets

and interrupts) and those related to the peripheral func-

tions. The reset and interrupt registers are described in

their respective chapters, while the ALU’s STATUS reg-

ister is described later in this section. Registers related

to the operation of a peripheral feature are described in

the chapter for that peripheral.

The SFRs are typically distributed among the

peripherals whose functions they control. Unused SFR

locations are unimplemented and read as ‘0’s.

TABLE 5-1:

SPECIAL FUNCTION REGISTER MAP FOR PIC18F2X1X/4X1X DEVICES

Address

Name

Address

Name

Address

Name

Address

Name

FFFh

TOSU

FDFh

INDF2(1)

FBFh

CCPR1H

F9Fh

IPR1

FFEh

TOSH

FDEh POSTINC2(1)

FBEh

CCPR1L

F9Eh

PIR1

FFDh

TOSL

FDDh POSTDEC2(1)

FBDh

CCP1CON

F9Dh

PIE1

FFCh

STKPTR

FDCh

PREINC2(1)

FBCh

CCPR2H

F9Ch

—(2)

FFBh

PCLATU

FDBh

PLUSW2(1)

FBBh

CCPR2L

F9Bh

OSCTUNE

FFAh

PCLATH

FDAh

FSR2H

FBAh

CCP2CON

F9Ah

—(2)

FF9h

PCL

FD9h

FSR2L

FB9h

—(2)

F99h

—(2)

FF8h

TBLPTRU

FD8h

STATUS

FB8h

BAUDCON

F98h

—(2)

FF7h

TBLPTRH

FD7h

TMR0H

FB7h PWM1CON(3)

F97h

—(2)

FF6h

TBLPTRL

FD6h

TMR0L

FB6h ECCP1AS(3)

F96h

TRISE(3)

FF5h

TABLAT

FD5h

T0CON

FB5h

CVRCON

F95h

TRISD(3)

FF4h

PRODH

FD4h

—(2)

FB4h

CMCON

F94h

TRISC

FF3h

PRODL

FD3h

OSCCON

FB3h

TMR3H

F93h

TRISB

FF2h

INTCON

FD2h

HLVDCON

FB2h

TMR3L

F92h

TRISA

FF1h

INTCON2

FD1h

WDTCON

FB1h

T3CON

F91h

—(2)

FF0h

INTCON3

FD0h

RCON

FB0h

SPBRGH

F90h

—(2)

FEFh

INDF0(1)

FCFh

TMR1H

FAFh

SPBRG

F8Fh

—(2)

FEEh POSTINC0(1)

FCEh

TMR1L

FAEh

RCREG

F8Eh

—(2)

FEDh POSTDEC0(1)

FCDh

T1CON

FADh

TXREG

F8Dh

LATE(3)

FECh

PREINC0(1)

FCCh

TMR2

FACh

TXSTA

F8Ch

LATD(3)

FEBh

PLUSW0(1)

FCBh

PR2

FABh

RCSTA

F8Bh

LATC

FEAh

FSR0H

FCAh

T2CON

FAAh

—(2)

F8Ah

LATB

FE9h

FSR0L

FC9h

SSPBUF

FA9h

—(2)

F89h

LATA

FE8h

WREG

FC8h

SSPADD

FA8h

—(2)

F88h

—(2)

FE7h

INDF1(1)

FC7h

SSPSTAT

FA7h

—(2)

F87h

—(2)

FE6h POSTINC1(1)

FC6h

SSPCON1

FA6h

—(2)

F86h

—(2)

FE5h POSTDEC1(1)

FC5h

SSPCON2

FA5h

—(2)

F85h

—(2)

FE4h

PREINC1(1)

FC4h

ADRESH

FA4h

—(2)

F84h

PORTE(3)

FE3h

PLUSW1(1)

FC3h

ADRESL

FA3h

—(2)

F83h

PORTD(3)

FE2h

FSR1H

FC2h

ADCON0

FA2h

IPR2

F82h

PORTC

FE1h

FSR1L

FC1h

ADCON1

FA1h

PIR2

F81h

PORTB

FE0h

BSR

FC0h

ADCON2

FA0h

PIE2

F80h

PORTA

Note 1:

This is not a physical register.

Unimplemented registers are read as ‘0’.

This register is not available on 28-pin devices.

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